Konsep Dasar TCP/IP Dalam konsep komunikasi data suatu jaringan komputer, ada mekanisme pengiriman data dari komputer sumber ke komputer tujuan diman

Konsep Dasar TCP/IP

Dalam konsep komunikasi data suatu jaringan komputer, ada mekanisme pengiriman data dari komputer sumber ke komputer tujuan dimana proses pengiriman paket data tersebut sampai dengan benar ke komputer yang dituju. Tentunya dalam proses pengiriman yang terjadi tidak semudah yang dipikirkan. Alasan pertama, komputer tujuan berada jauh dari komputer sumber sehingga paket data yang dikirimkan bisa saja hilang atau rusak di tengah jalan. Alasan lainnya, mungkin komputer tujuan sedang menunggu/mengirimkan paket data dari/ke komputer yang lain. Tentunya paket data yang akan dikirimkan diharapkan sampai dengan tepat tanpa terjadi kerusakan. Untuk mengatur mekanisme komunikasi data tersebut dibutuhkan pengaturan proses pengiriman data yang dikenal sebagai protocol. Protokol di sini adalah sebuah perangkat lunak yang melekat pada setiap sistem operasi tertentu.

TCP/IP (singkatan dari “Transmission Control Protocol”)

adalah sekumpulan protokol yang didesain untuk melakukan fungsi-fungsi komunikasi data pada jaringan komputer. TCP/IP terdiri atas sekumpulan protokol yang masing-masing bertanggung jawab atas bagian-bagian tertentu dari komunikasi data. Kesimpulannya, TCP/IP inilah yang memungkinkan kumpulan komputer untuk berkomunikasi dan bertukar data didalam suatu jaringan.

TCP/IP dapat diterapkan dengan mudah di setiap jenis komputer dan inteface jaringan, karena sebagian besar isi kumpulan protokol ini tidak spesifik terhadap satu komputer atau peralatan jaringan tertentu. Sekumpulan protokol TCP/IP ini dimodelkan dengan empat layer TCP/IP, sebagaimana terlihat pada gambar dibawah ini.

Konsep TCP/IP

Dalam konsep komunikasi data suatu jaringan komputer, ada mekanisme pengiriman data dari komputer sumber ke komputer tujuan dimana proses pengiriman paket data tersebut sampai dengan benar ke komputer yang dituju. Tentunya dalam proses pengiriman yang terjadi tidak semudah yang dipikirkan. Alasan pertama, komputer tujuan berada jauh dari komputer sumber sehingga paket data yang dikirimkan bisa saja hilang atau rusak di tengah jalan. Alasan lainnya, mungkin komputer tujuan sedang menunggu/mengirimkan paket data dari/ke komputer yang lain. Tentunya paket data yang akan dikirimkan diharapkan sampai dengan tepat tanpa terjadi kerusakan. Untuk mengatur mekanisme komunikasi data tersebut dibutuhkan pengaturan proses pengiriman data yang dikenal sebagai protocol. Protokol di sini adalah sebuah perangkat lunak yang melekat pada setiap sistem operasi tertentu.

Lapisan Network

Lapisan Network bertanggung jawab mengirim dan menerima data ke dan dari media fisik. Media fisiknya dapat berupa kabel, serat optik atau gelombang radio. Karena tugasnya ini, protokol pada layer ini harus mampu menterjemahkan sinyal listrik menjadi data digital yang di mengerti oleh komputer, yang berasal dari peralatan lain yang sejenis.
Lapisan Internet

Lapisan Internet bertanggung jawab dalam proses pengiriman paket ke alamat yang tepat. Pada layer ini terdapat tiga macam protokol, yaitu IP, ARP, dan ICMP. IP (Internet Protocol) berfungsi untuk menyampaikan paket data ke alamat yang tepat. ARP (Address Resulotion Protocol) ialah protokol yang digunakan untuk menemukan alamat hardaware dari host/komputer yang terletak pada network yang sama. Sedangkan ICMP (Internet Control Massage Protocol) ialah protokol yang digunakan untuk mengirimkan pesan dan melaporkan kegagalan pengiriman data.
Lapisan Transport

Layer Transport, berisi protokol yang bertanggung jawab untuk mengadakan komunikasi antara dua host/komputer. Pada lapisan Transport menggunakan Acknowledgement positif dan Acknowledgement negative pada aliran datanya. Acknowlegment positif akan memberitahukan pesan apabila data yang di transferkan telah sampai sedangkan Acknowledgement negative jika paket yang ditransfer tidak sampai ke tujuan maka akan terjadi pengiriman ulang. Kedua protokol tersebut ialah TCP (Transmission Control Protokol) dan UDP (User Datagram Protocol).
Lapisan Aplikasi

Layer teratas adalah Aplication Layer. Pada layer inilah terletak semua aplikasi yang menggunakan protokol TCP/IP misalnya http, ftp, telnet, smpt dan lain sebagainya.

IP Addressing

IP address digunakan untuk mengidentifikasi interface jaringan pada host dari suatu komputer. Dengan adanya IP address masing-masing host dapat terhubung dan saling bertukar informasi melalaui media transmisi kabel seperti UTP, koaksil atau fiber optic. Sebagai contoh sederhana, jika sebuah surat akan dikirimkan/ ditujukan ke orang lain maka surat tersebut harus dilengkapi dengan alamat lengkap si penerima. Tentu juga alamat si pengirim perlu dicantumkan untuk memudahkan penerima dari mana datangnya surat tersebut. Jika alamat si penerima tidak lengkap misalnya tidak ada nomor rumah, tidak di cantumkan nama penerima maka surat tersebut dipastikan tidak akan sampai.
IP address adalah sekelompok bilangan biner 32 bit yang dibagi menjadi 4 bagian yang masing-masing bagian itu terdiri dari 8 bit, angka pada masing-masing bit tersebut adalah angka 1 dan 0. misalnya : 11000111. Nilai paling besar dari biner 8 bit adalah 255, angka 255 ini dihitung dari bilangan biner 2 berpangkat.
Misalnya :
11111111 = 27 + 26 + 25 + 24 + 23 + 22 + 21 + 20
= 128 + 64 + 32 + 16 + 8 + 4 + 2 + 1
= 255
Dengan demikian IP address yang terdiri dari 4 bagian bilangan 8 bit maka nilai terbesar IP address tersebut adalah
11111111.11111111.11111111.11111111 atau 255.255.255.255.255
Untuk memudahkan kita dalam membaca dan mengingat suatu alamat IP maka umumnya penamaan yang digunakan adalah berdasarkan bilangan desimal.
IP address dibagi menjadi kelas-kelas yang masing-masing mempunyai kapasitas jumlah IP yang berbeda-beda. IP address terdiri dari dua bagian yaitu bagian network ID dan host ID. Network ID menunjukkan ID alamat jaringan tempat host-host berada sedangkan host ID adalah bagian yang menunjukkan host itu berada. Sederhananya, Network ID seperti nama jalan sedangkan Host ID adalah nomor rumah di jalan tersebut.
Kelas-kelas IP address adalah sebagai berikut :

Kelas A
IP address kelas A terdiri dari 8 bit untuk network ID dan sisanya 24 bit digunakan untuk host ID, sehingga IP address kelas A digunakan untuk jaringan dengan jumlah host sangat besar. Pada bit pertama berikan angka 0 sampai dengan 127.

Karakteristik IP Kelas A
Format : 0NNNNNNN.HHHHHHHH.HHHHHHHH.HHHHHHHH
Bit Pertama : 0
NetworkID : 8 bit
HostID : 24 bit
Bit Pertama : 0 -127
Jumlah : 126 (untuk 0 dan 127 dicadangkan)
Range IP : 1.x.x.x – 126.x.x.x
Jumlah IP : 16.777.214
Misalnya IP address 120.31.45.18 maka
Network ID = 120
HostID = 31.45.18
Jadi IP di atas mempunyai host dengan nomor 31.45.18 pada jaringan 120

Kelas B
IP address kelas B terdiri dari 16 bit untuk network ID dan sisanya 16 bit digunakan untuk host ID, sehingga IP address kelas B digunakan untuk jaringan dengan jumlah host tidak terlalu besar. Pada 2 bit pertama berikan angka 10 sehingga bit awal IP tersebut mulai dari 128 – 191.

Karakteristik IP Kelas B
Format : 10NNNNNN..NNNNNNNN.HHHHHHHH.HHHHHHHH
Bit Pertama : 10
NetworkID : 16 bit
HostID : 16 bit
Bit Pertama : 128 -191
Jumlah : 16.384
Range IP : 128.1.x.x – 191.155.x.x
Jumlah IP : 65.532
Misalnya IP address 150.70.45.18 maka
Network ID = 150.70
HostID = 60.56
Jadi IP di atas mempunyai host dengan nomor 60.56 pada jaringan 150.70

Kelas C
IP address kelas C terdiri dari 24 bit untuk network ID dan sisanya 8 bit digunakan untuk host ID, sehingga IP address kelas C digunakan untuk jaringan untuk ukuran kecil. Kelas C biasanya digunakan untuk jaringan Local Area Network atau LAN. Pada 3 bit pertama berikan angka 110 sehingga bit awal IP tersebut mulai dari 192 – 223.

Karakteristik IP Kelas C
Format : 110NNNNN.NNNNNNNN.NNNNNNNN.HHHHHHHH
Bit Pertama : 110
NetworkID : 24 bit
HostID : 8 bit
Bit Pertama : 192 - 223
Jumlah : 16.384
Range IP : 192.0.0.x.x – 223.255.255.x.x
Jumlah IP : 254 IP
Misalnya IP address 192.168.1.1 maka
Network ID = 192.168.1
HostID = 1
Jadi IP di atas mempunyai host dengan nomor 1 pada jaringan 192.168.1
Kelas IP address lainnya adalah D dan E, namum kelas IP D dan E tersebut tidak digunakan untuk alokasi IP secara normal namum digunakan untuk IP multicasting dan untuk experimental.

Prinsip Kerja TCP

TCP mempunyai prinsip kerja seperti “virtual circuit” pada jaringan telepon. TCP lebih mementingkan tata-cara dan keandalan dalam pengiriman data antara dua komputer dalam jaringan. TCP tidak peduli dengan apa-apa yang dikerjakan oleh IP, yang penting adalah hubungan komunikasi antara dua komputer berjalan dengan baik. Dalam hal ini, TCP mengatur bagaimana cara membuka hubungan komunikasi, jenis aplikasi apa yang akan dilakukan dalam komunikasi tersebut (misalnya mengirim e-mail, transfer file, dsb.) Di samping itu, juga mendeteksi dan mengoreksi jika ada kesalahan data. TCP mengatur seluruh proses koneksi antara satu komputer dengan komputer yang lain dalam sebuah jaringan komputer.
Berbeda dengan IP yang mengandalkan mekanisme connectionless pada TCP mekanisme hubungan adalah connection oriented. Dalam hal ini, hubungan secara logik akan dibangun oleh TCP antara satu komputer dengan komputer yang lain. Dalam waktu yang ditentukan komputer yang sedang berhubungan harus mengirimkan data atau acknowledge agar hubungan tetap berlangsung. Jika hal ini tidak sanggup dilakukan maka dapat diasumsikan bahwa komputer yang sedang berhubungan dengan kita mengalami gangguan dan hubungan secara logik dapat diputus.
Hal yang cukup penting untuk dipahami pada TCP adalah port number. Port number menentukan servis yang dilakukan oleh program aplikasi diatas TCP. Nomor-nomor ini telah ditentukan oleh Network Information Center dalam Request For Comment (RFC) 1010 [10]. Sebagai contoh untuk aplikasi File Transfer Protokol (FTP) diatas transport layer TCP digunakan port number 20 dan masih banyak lagi.
Prinsip kerja dari TCP berdasarkan prinsip client-server. Dimana server adalah program pada komputer yang secara pasif akan mendengarkan (listen) port number yang telah ditentukan pada TCP. Sedang client adalah program yang secara aktif akan membuka hubungan TCP ke komputer server untuk meminta servis yang dibutuhkan.
Awalnya suatu paket dengan SYN-flag dikirim ke IP tujuan, tujuan akan memberikan respon dengan suatu ACK(SYN) flag atau suatu paket dengan RST-flag. SYN singkatan dari SYN-(synchronisation), yang digunakan untuk ‘memberitahukan’ komputer tujuan suatu permintaan melakukan koneksi, kalau diterima, maka permintaan tersebut akan dijawab dengan suatu paket ACK(SYN) flag. ACK singkatan dari ACK-(Acknowledgement). Setelah menerima paket dengan ACK(SYN) flag, komputer mengirim kembali suatu ACK memberitahukan host lain bahwa koneksi telah dibuat. Hal ini kita sebut sebagai “Three-Way-Handshake”. Jika koneksi telah dibuat dan salah satu host ingin melakukan disconnect, akan dikirim suatu paket dengan FIN-flag diaktifkan. (FIN singkatan dari FINish).

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IP Address Dan Subneting

Perhitungan IP Address Dan Subneting
IP Address Dan Subneting

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instalasi perangkat jaringan WAN

instalasi perangkat jaringan WAN

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Intel 80386

"386 DX" redirects here. For the Russian artist and musician, see Alexei Shulgin.

Intel 386

Intel 80386 DX rated at 16 MHz
Produced	From 1985 to September 2007
Common manufacturer(s)	Intel AMD IBM
Max. CPU clock rate	12 MHz to 40 MHz
Min. feature size	1.5µm to 1µm
Instruction set	x86 (IA-32)
Package(s)	132-pin PGA, 132-pinPQFP; SX variant: 100-pinPQFP

The Intel 80386, also known as the i386, or just 386, was a 32-bit microprocessor introduced byIntel in 1985. The first versions had 275,000 transistors and were used as the central processing unit (CPU) of many workstations and high end personal computers of the time. As the original implementation of the 32-bit extension of the 8086 architecture, the 80386 instruction set, programming model, and binary encodings are still the common denominator for all 32-bit x86processors. This is termed x86, IA-32, or the i386-architecture, depending on context.

The 80386 could correctly execute most code intended for earlier 16-bit x86 processors such as the 8088 and 80286 that were ubiquitous in early PCs. Following the same tradition, modern 64-bit x86 processors are able to run most programs written for older chips, all the way back to the original 16-bit 8086 of 1978. Over the years, successively newer implementations of the same architecture have become several hundreds of times faster than the original 80386 (and thousands of times faster than the 8086).^[1] A 33 MHz 80386 was reportedly measured to operate at about 11.4 MIPS.^[2]

The 80386 was launched in October 1985, but full-function chips were first delivered in the third quarter of 1986.^[3][4] Mainboards for 80386-based computer systems were cumbersome and expensive at first, but manufacturing was rationalized upon the 80386's mainstream adoption. The first personal computer to make use of the 80386 was designed and manufactured byCompaq.^[5] and marked the first time a fundamental component in the IBM PC compatible de facto-standard was updated by another company than IBM.

In May 2006, Intel announced that 80386 production would stop at the end of September 2007.^[6]Although it had long been obsolete as a personal computer CPU, Intel and others had continued making the chip for embedded systems. Such systems using an 80386 or one of many derivatives are common in aerospace technology, among others.

1 Architecture 1.1 The i386SX variant 1.2 The i386SL variant 2 Business importance 3 Compatibles 4 Early problems 5 Pin-compatible upgrades 6 Models and variants 6.1 Early 5V models 6.1.1 i386DX 6.1.2 i386SX 6.1.3 i386SL 6.1.4 RapidCAD 6.2 Versions for embedded systems 6.2.1 i376 6.2.2 i386EX, i386EXTB and i386EXTC 6.2.3 i386CXSA and i386SXSA (or i386SXTA) 6.2.4 i386CXSB 7 Notes and references 8 External links

Architecture

Block diagram of the i386 microarchitecture.

The processor was a significant evolution in the x86 architecture, and the latest of a long line of processors that stretched back to the Intel 8008. The predecessor of the 80386 was the Intel 80286, a 16-bit processor with a segment-based memory management and protection system. The 80386 added a 32-bit architecture and apaging translation unit, which made it much easier to implement operating systems that used virtual memory. It also had support for hardware debugging.

The 80386 featured three operating modes: real mode, protected mode and virtual mode. The protected mode which debuted in the 286 was extended to allow the 386 to address up to 4 GB of memory. The all new virtual 8086 mode (or VM86) made it possible to run one or more real mode programs in a protected environment, although some programs were not compatible.

The 32-bit flat memory model of the 386 would arguably be the most important feature change for the x86 processor family until AMD released x86-64 in 2003.

Chief architect in the development of the 80386 was John H. Crawford.^[7] He was responsible for the 32-bit extension of the 80286 architecture and instruction set, and he then led the microprogram development for the 80386 chip.

The 80486 and P5 Pentium line of processors were descendants of the 80386 design.

The i386SX variant

The Intel 80386SX processor of aCompaq Deskpro computer.

In 1988, Intel introduced the i386SX, a low cost version of the 80386 with a 16-bit data bus. The CPU remained fully 32-bit internally, but the 16-bit bus was intended to simplify circuit board layout and reduce total cost.^[8] The 16-bit bus simplified designs but hampered performance. Only 24 pins were connected to the address bus, therefore limiting addressing to 16 MB,^[9] but this was not a critical constraint at the time. Performance differences were due not only to differing databus-widths, but also to performance-enhancing cache memories often employed on boards using the original chip.

The original 80386 was subsequently renamed i386DX to avoid confusion. However, Intel subsequently used the 'DX' suffix to refer to the floating-point capability of the i486DX. The i387SX was an i387 part that was compatible with the i386SX (i.e. with a 16-bit databus). The 386SX was packaged in a surface-mount QFP, and sometimes offered in a socket to allow for an upgrade.

The i386SL variant

The i386SL was introduced as a power efficient version for laptop computers. The processor offered several power management options (e.g.SMM), as well as different "sleep" modes to conserve battery power. It also contained support for an external cache of 16 to 64 kB. The extra functions and circuit implementation techniques caused this variant to have over 3 times as many transistors as the i386DX. The i386SL was first available at 20 MHz clock speed,^[10] with the 25 MHz model later added.^[11]

Business importance

The first company to design and manufacture a PC based on the Intel 80386 was Compaq. By extending the 16/24-bit IBM PC/AT standard into a natively 32-bit computing environment, Compaq became the first third party to implement a major technical hardware advance on the PC platform. IBM was offered use of the 80386, but had manufacturing rights for the earlier 80286, which was equally fast as the 386 at the same clock rate, but less capable. IBM therefore chose to rely on that processor for a couple of more years. The early success of the Compaq 386 PC played an important role in legitimizing the PC "clone" industry, and in de-emphasizing IBM's role within it.

Prior to the 386, the difficulty of manufacturing microchips and the uncertainty of reliable supply made it desirable that any mass-market semiconductor be multi-sourced, that is, made by two or more manufacturers, the second and subsequent companies manufacturing under license from the originating company. The 386 was for a time only available from Intel, since Andy Grove, Intel's CEO at the time, made the decision not to encourage other manufacturers to produce the processor as second sources. This decision was ultimately crucial to Intel's success in the market.^{[citation needed]} The 386 was the first significant microprocessor to be single-sourced. Single-sourcing the 386 allowed Intel greater control over its development and substantially greater profits in later years.

AMD introduced its compatible Am386 processor in March 1991 after overcoming legal obstacles, thus ending Intel's monopoly on 386-compatible processors. IBM also later manufactured 386 chips under license.

Compatibles

IBM 80386DX 25 MHz with Intel core.

• The AMD Am386SX and Am386DX were almost exact clones of the 80386SX and 80386DX. Legal disputes caused production delays for several years, but AMD's 40 MHz part eventually became very popular with computer enthusiasts as a low cost and low power alternative to the 25 MHz 486SX. The power draw was further reduced in the "notebook models" (Am386 DXL/SXL/DXLV/SXLV) which could operate with 3.3V and were implemented in fully static CMOS circuitry.

• Chips and Technologies Super386 38600SX and 38600DX were developed using reverse engineering. They sold poorly, due to some technical errors and incompatibilities, as well as their late appearance on the market. They were therefore short-lived products.

• Cyrix Cx486SLC/Cx486DLC could be (simplistically) described as a kind of 386/486 hybrid chip that included a small amount of on-chip cache. It was popular among computer enthusiasts but did poorly with OEMs. The Cyrix Cx486SLC and Cyrix Cx486DLC processors were pin-compatible with 80386SX and 80386DX respectively. These processors were also manufactured and sold by Texas Instruments.

• IBM 386SLC and 486SLC/DLC were variants of Intel's design which contained a large amount of on-chip cache (8 kB, and later 16 kB). The agreement with Intel limited their use to IBM's own line of computers and upgrade boards only, so they were not available on the open market.

Early problems

An Intel 80386 marked "16 BIT S/W ONLY".

Intel originally intended for the 80386 to debut at 16 MHz. However, due to poor yields, it was instead introduced at 12 MHz.

Early in production, Intel discovered a bug that could cause a system to unexpectedly halt when running 32-bit software. Not all of the processors already manufactured were affected, so Intel tested its inventory. Processors that were found to be bug-free were marked with a double-sigma (ΣΣ), and affected processors were marked "16 BIT S/W ONLY". These latter processors were sold as good parts, since at the time 32 bit capability was not relevant for most users. Such chips are now extremely rare.

The i387 math coprocessor was not ready in time for the introduction of the 80386, and so many of the early 80386 motherboards instead provided a socket and hardware logic to make use of an 80287. In this configuration the FPU would operate asynchronously to the CPU, usually with a clock rate of 10 MHz. The original Compaq Deskpro 386 is an example of such design. However, this was an annoyance to those who depended on floating point performance, as the performance of the 287 was nowhere near that of the 387.

Pin-compatible upgrades

Typical 386 Upgrade CPUs from Cyrix and Texas Instruments.

Intel later offered a modified version of its 80486DX in 80386 packaging, branded as the Intel RapidCAD. This provided an upgrade path for users with 80386-compatible hardware. The upgrade was a pair of chips that replaced both the 80386 and 80387. Since the 80486DX design contained an FPU, the chip that replaced the 80386 contained the floating point functionality, and the chip that replaced the 80387 served very little purpose. However, the latter chip was necessary in order to provide the FERR signal to the mainboard and appear to function as a normal floating point unit. The CAD branding referred to the ease of upgrading existing OEM designs from 386 to 486 CPUs with rapid turn-around in the CAD room.

Third parties offered a wide range of upgrades, for both SX and DX systems. The most popular ones were based on the Cyrix 486DLC/SLC core, which typically offered a substantial speed improvement due to its more efficient instruction pipeline and internal L1 SRAM cache. The cache was usually 1 kB, or sometimes 8 kB in the TI variant. Some of these upgrade chips (such as the 486DRx2/SRx2) were marketed by Cyrix themselves, but they were more commonly found in kits offered by upgrade specialists such as Kingston, Evergreen and Improve-It Technologies. Some of the fastest CPU upgrade modules featured the IBM SLC/DLC family (notable for its 16 kB L1 cache), or even the Intel 486 itself. Many 386 upgrade kits were advertised as being simple drop-in replacements, but often required complicated software to control the cache and/or clock doubling.

Overall it was very difficult to configure upgrades to produce the results advertised on the packaging, and upgrades were often less than 100% stable and/or less than 100% compatible.

Models and variants

Early 5V models

i386DX

Intel i386DX, 25 MHz.

Original version, released in October 1985.

• Cache: depends on mainboard
• Package: PGA-132 or PQFP-132
• Process: First types CHMOS III, 1.5 µm, later CHMOS IV, 1 µm
• Die size: 104 mm² (ca. 10 mm x 10 mm) in CHMOS III and 39 mm² (6 mm x 6.5 mm) in CHMOS IV.
• Transistor count: 275 000
• Specified max clock: 12 MHz (early models), later 16, 20, 25 and 33 MHz

i386SX 16 MHz.

i386SX

Compact budget version, released in June 1988.

• Cache: depends on mainboard
• Package: PQFP-100, PGA-88
• Process: CHMOS IV, 1 µm
• Die size: 104 mm²
• Transistor count: 275 000
• Specified max clock: 16, 20, 25, and 33 MHz

i386SL

i386SL 20 MHz.

Mobile version of the i386SX with System Management Mode (SMM), released 15 October 1990

• Cache: 16 KB - 64 KB
• Package: PQFP-132
• Process: 1 µm
• Transistor count: 855 000
• Specified max clock: 25 MHz

RapidCAD

Main article: RapidCAD

A specially packaged Intel 486DX and a dummy floating point unit (FPU) designed as pin-compatible replacements for an Intel 80386 processor and 80387 FPU.

Versions for embedded systems

i376

Main article: Intel 80376

This was an embedded version of the i386SX which did not support real mode and paging in the MMU.

i386EX, i386EXTB and i386EXTC

Main article: Intel 80386EX

Intel i386EXTC, 25 MHz.

System and power management and built in peripheral and support functions: Two 82C59A interrupt controllers; Timer, Counter (3 channels); Asynchronous SIO (2 channels); SynchronousSIO (1 channel); Watchdog timer (Hardware/Software); PIO. Usable with i387SX or i387SL FPUs.

• Data/address bus: 16 / 26 bits
• Package: PQFP-132, SQFP-144 and PGA-168
• Process: CHMOS V, 0.8 µm
• Specified max clock:
  • i386EX: 16 MHz @2.7~3.3 Volt or 20 MHz @3.0~3.6 Volt or 25 MHz @4.5~5.5 Volt
  • i386EXTB: 20 MHz @2.7~3.6 Volt or 25 MHz @3.0~3.6 Volt
  • i386EXTC: 25 MHz @4.5~5.5 Volt or 33 MHz @4.5~5.5 Volt

i386CXSA and i386SXSA (or i386SXTA)

Intel i386CXSA, 25 MHz.

Transparent power management mode, integrated MMU and TTL compatible inputs (only 386SXSA). Usable with i387SX or i387SL FPUs.

• Data/address bus: 16 / 26 bits (24 bits for i386SXSA)
• Package: PQFP-100
• Voltage: 4.5~5.5 Volt (25 and 33 MHz); 4.75~5.25 Volt (40 MHz)
• Process: CHMOS V, 0.8 µm
• Specified max clock: 25, 33, 40 MHz

i386CXSB

Transparent power management mode and integrated MMU. Usable with i387SX or i387SL FPUs.

• Data/address bus: 16 / 26 bits
• Package: PQFP-100
• Voltage: 3.0 Volt (16 MHz) or 3.3 Volt (25 MHz)
• Process: CHMOS V, 0.8 µm
• Specified max clock: 16, 25 MHz

Notes and references

Computer Science portal

1. ^ Not counting the advances in the performance of corresponding x87 implementations. These are measured in tens of thousands of times, compared to the original 8087, or hundreds of thousands of times compared to software implementations of floating point on the 8086.
2. ^ [1]
3. ^ Forbes, Jim (January 27, 1986). "Development of 386 Accelerating". InfoWorld (InfoWorld Media Group) 8 (4): p. 5. ISSN 0199-6649.Introduced October 1985, production chip in June 1986
4. ^ Ranney, Elizabeth (September 1, 1986). "ALR Hopes to Beat Completion With Fall Release of 386 Line". InfoWorld (InfoWorld Media Group) 8 (35): p. 5. ISSN 0199-6649.First 80386 computers released around October 1986
5. ^ [2]^{[dead link]}
6. ^ "Intel cashes in ancient chips".
7. ^ "Intel Fellow - John H. Crawford". Intel.com. 2010-08-16. Retrieved 2010-09-17.
8. ^ This was a similar approach to that used by Intel with the 8088 that was used in the original IBM PC.
9. ^ The 16 MB limit was similar to that of the 68000, a comparable processor.
10. ^ "Chronology of Microprocessors (1990-1992)". Islandnet.com. Retrieved 2010-09-17.
11. ^ Mueller, Scott. "Microprocessor Types and Specifications > P3 (386) Third-Generation Processors". InformIT. Retrieved 2010-09-17.

• Intel 80386 Programmer's Reference Manual 1986 (PDF)
• Intel 80386 processor family

v • d • e Intel processors
Discontinued	pre-x86 4004 · 4040 · 8008 · 8080 · 8085 x86-16 (16 bit) 8086 · 8088 · 80186 · 80188 · 80286 x87 (external FPUs) 8/16-bit databus: 8087 · 16-bit databus: 80287 · 32-bit databus: 80387 · 80487 x86-32/IA-32 (32 bit) 80386 (SX · 376 · EX) · 80486 (SX · DX2 · DX4 · SL · RapidCAD · OverDrive) ·Pentium (Original · OverDrive · Pro · II · II OverDrive · III · 4 · M) · Core · Celeron M · Celeron D · A100/A110 x86-64/EM64T (64 bit) Pentium 4 · Pentium D · Pentium Extreme Edition · Celeron D · Core 2 Other iAPX 432 — RISC: i860 · i960 · StrongARM · XScale
Current	x86-32: EP80579 · Intel CE · Atom — x86-64: Atom (some) · Celeron · Pentium (Dual-Core) · Core (i3 · i5 · i7) · Xeon — Other: IOP · Itanium
Lists	CPU sockets · CPU power dissipation · Chipsets · PCHs · SCHs · ICHs · PIIXs · Microarchitectures · Processors · Future Processors ·Codenames · GMA · Atom · Celeron · Core (2 · i3 · i5 · i7) · Itanium · Pentium (Pro · II · III · 4 · D · M · Dual-Core) · Xeon
Microarchitectures	P5 [show] P5 based cores P6 [show] P6 based cores NetBurst [show] NetBurst based cores Core [show] Core based cores Bonnell [show] Bonnell based cores Nehalem [show] Nehalem based cores Future Larrabee · Sandy Bridge · Haswell

Source : http://en.wikipedia.org/wiki/Intel_80386

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